Due to the increased demand for mobile devices, power consumption has been a major concern in designing integrated circuits, especially for driver circuits to drive antenna switches, liquid crystal displays (LCDs), and memories because these components are integrated in one mobile device to satisfy the customers' demand on functionalities. The integration of these various functional blocks, typically digital blocks, led to the ever-shrinking feature size of a CMOS technology, and the scaling-down resulted in a lower power-supply voltage. However, many driver circuits still need a higher voltage than a given power-supply voltage. In addition, a negative voltage is necessary for many applications, which include memories and antenna switches. To generate the high voltage or the negative voltage, charge pumps have traditionally been used because they are small in size and dissipate relatively small amounts of power. However, the charge pump is still the dominant power consumer in the driver circuits.
Many techniques have been introduced to reduce the power consumption of the charge pump. Some of the techniques focused on the efficiency of the charge pumping mechanism. Other techniques introduced new clocking schemes, such as a four-phase clocking scheme, which uses four different phases of a clock signal instead of two out-of-phase clock signals, to improve the efficiency of the charge pump. However, these techniques aimed to improve the efficiency of the charge transfer cells with already-given clock signals. The efficiency of the clock generation blocks has been overlooked.
Prior art charge pump circuits with CMOS-inverter clock buffers draw a significant amount of power to drive the capacitors in the charge transfer cells. The power consumed to generate the clock signals is a dominant factor in the total power consumption of the charge pump, and it becomes more critical when the charge transfer cells utilize larger capacitors or the number of charge transfer cells is increased to make higher output voltages.
Thus, there is an opportunity in the industry for systems, methods, and apparatuses for CMOS driver circuits using shared-charge recycling pump structures.